Add HGLRCF435_AIO board #883
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WalkthroughAdds a new board configuration header for the HGLRCF435_AIO target, defining MCU/board IDs, enabling sensors/peripherals, specifying UART/I2C/SPI/ADC/timer pin mappings, gyro alignment/clock-in, default meters/blackbox, system clock, and serial RX settings. Changes
Estimated code review effort🎯 2 (Simple) | ⏱️ ~10 minutes Possibly related PRs
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Actionable comments posted: 1
🧹 Nitpick comments (3)
configs/HGLRCF435_AIO/config.h (3)
39-42: LEDs on SWD pins: confirm debug implications and document.LED0/LED1 on PA13/PA14 will conflict with SWD unless the debug interface is disabled. If this reflects the shipping hardware (likely), keep it, but please add a short comment noting SWD impact so field techs aren’t surprised during bring-up.
48-48: LED strip on PA8 (TIM1 CH1) is standard; check for DMA/timer contention only if you later switch off bitbang DSHOT.No changes needed now. If you disable bitbang in future, re-verify motor/LED/timer DMA coexistence per target DMA rules.
Also applies to: 111-111
92-98: Bitbang DSHOT default ON: acceptable; keep an eye on CPU headroom.On F435-class parts this is usually fine, but if you later add CPU-heavy features, consider verifying runtime load or moving motors to timer/DMA DSHOT with a conflict-free timer plan.
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📒 Files selected for processing (1)
configs/HGLRCF435_AIO/config.h(1 hunks)
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🧠 Learnings (10)
📓 Common learnings
Learnt from: haslinghuis
PR: betaflight/config#835
File: configs/HDZERO_HALO_MPU6000/config.h:44-56
Timestamp: 2025-07-14T16:16:56.822Z
Learning: For Betaflight board configurations of boards already in production, pin assignments in config.h files reflect the actual hardware design and cannot be changed, even if they present potential conflicts with debug interfaces. The configuration must match the physical board layout, not ideal software design preferences.
Learnt from: ot0tot
PR: betaflight/config#0
File: :0-0
Timestamp: 2025-07-03T04:33:57.480Z
Learning: Always verify that the `BOARD_NAME` define in config.h files exactly matches the directory name where the config file is located. For example, if the config file is in configs/AXISFLYINGF7AIO/config.h, then the BOARD_NAME should be defined as "AXISFLYINGF7AIO". This ensures proper board identification and configuration loading in Betaflight.
Learnt from: ot0tot
PR: betaflight/config#0
File: :0-0
Timestamp: 2025-07-03T04:33:57.480Z
Learning: Always verify that the BOARD_NAME define in each config.h matches the directory name it resides in (e.g., configs/AXISFLYINGF7AIO/config.h must have #define BOARD_NAME AXISFLYINGF7AIO). This check is required for all Betaflight board configuration reviews.
Learnt from: haslinghuis
PR: betaflight/config#0
File: :0-0
Timestamp: 2025-07-03T15:17:30.040Z
Learning: In Betaflight configurations, when a target name suggests dual IMUs (like JHEF7DUAL) but specific hardware variants only have one gyro available, the preferred solution is to use DEFAULT_GYRO_TO_USE macro to specify which gyro to use by default rather than pruning gyro defines or creating redundant configurations. This approach maintains compatibility when the same target is used by multiple hardware variants from the same manufacturer.
Learnt from: haslinghuis
PR: betaflight/config#879
File: configs/AIRBOTSUPERF4V2/config.h:42-45
Timestamp: 2025-08-22T17:08:23.283Z
Learning: In Betaflight board configurations, OSD feature flags like USE_OSD_SD (analog/MAX7456) and USE_OSD_HD (digital/MSP DisplayPort) are typically defined at build time by the build system, not in the individual board config.h files. Board configs can conditionally define OSD-related settings based on these build-time flags.
📚 Learning: 2025-07-03T04:33:57.480Z
Learnt from: ot0tot
PR: betaflight/config#0
File: :0-0
Timestamp: 2025-07-03T04:33:57.480Z
Learning: Always verify that the BOARD_NAME define in each config.h matches the directory name it resides in (e.g., configs/AXISFLYINGF7AIO/config.h must have #define BOARD_NAME AXISFLYINGF7AIO). This check is required for all Betaflight board configuration reviews.
Applied to files:
configs/HGLRCF435_AIO/config.h
📚 Learning: 2025-07-14T16:16:56.822Z
Learnt from: haslinghuis
PR: betaflight/config#835
File: configs/HDZERO_HALO_MPU6000/config.h:44-56
Timestamp: 2025-07-14T16:16:56.822Z
Learning: For Betaflight board configurations of boards already in production, pin assignments in config.h files reflect the actual hardware design and cannot be changed, even if they present potential conflicts with debug interfaces. The configuration must match the physical board layout, not ideal software design preferences.
Applied to files:
configs/HGLRCF435_AIO/config.h
📚 Learning: 2025-07-03T04:33:57.480Z
Learnt from: ot0tot
PR: betaflight/config#0
File: :0-0
Timestamp: 2025-07-03T04:33:57.480Z
Learning: Always verify that the `BOARD_NAME` define in config.h files exactly matches the directory name where the config file is located. For example, if the config file is in configs/AXISFLYINGF7AIO/config.h, then the BOARD_NAME should be defined as "AXISFLYINGF7AIO". This ensures proper board identification and configuration loading in Betaflight.
Applied to files:
configs/HGLRCF435_AIO/config.h
📚 Learning: 2025-06-02T16:16:20.197Z
Learnt from: haslinghuis
PR: betaflight/config#0
File: :0-0
Timestamp: 2025-06-02T16:16:20.197Z
Learning: In STM32F405-based flight controller configurations, timer pin mappings must be carefully analyzed for DMA stream conflicts, especially between motor timers, LED strip timers, and SPI DMA assignments. Changes to TIMER_PIN_MAPPING should include verification that all required peripherals (motors, LED strip, blackbox SPI) can coexist without DMA conflicts.
Applied to files:
configs/HGLRCF435_AIO/config.h
📚 Learning: 2025-08-20T02:54:58.596Z
Learnt from: ot0tot
PR: betaflight/config#872
File: configs/HGLRCH743/config.h:82-83
Timestamp: 2025-08-20T02:54:58.596Z
Learning: For Betaflight board configuration reviews, the definitive source for validating UART pin assignments is the serial_uart_{platform}.c file in the Betaflight codebase (e.g., serial_uart_stm32h7xx.c for STM32H7xx platforms), not generic MCU datasheets. These files contain the exact pin mappings that Betaflight supports for each UART peripheral.
Applied to files:
configs/HGLRCF435_AIO/config.h
📚 Learning: 2025-07-23T13:43:50.456Z
Learnt from: ot0tot
PR: betaflight/config#0
File: :0-0
Timestamp: 2025-07-23T13:43:50.456Z
Learning: For Betaflight board configuration reviews, always verify that serial port defines (like ESC_SENSOR_UART, MSP_UART, GPS_UART, etc.) use valid SERIAL_PORT identifiers that match those defined in the Betaflight codebase at src/main/io/serial.h. Common valid identifiers include SERIAL_PORT_USART1, SERIAL_PORT_USART2, SERIAL_PORT_USART3, SERIAL_PORT_UART4, SERIAL_PORT_UART5, etc. Invalid identifiers like SERIAL_PORT_UART3 (should be SERIAL_PORT_USART3) will cause build failures.
Applied to files:
configs/HGLRCF435_AIO/config.h
📚 Learning: 2025-06-23T18:43:31.746Z
Learnt from: haslinghuis
PR: betaflight/config#822
File: configs/AXISFLYINGH7MINI/config.h:29-37
Timestamp: 2025-06-23T18:43:31.746Z
Learning: In Betaflight configuration files, feature enablement macros like USE_MAG are build options that can be controlled at compile time, while hardware instance definitions like MAG_I2C_INSTANCE are predefined in board configurations to assist with hardware mapping when those features are enabled at build time.
Applied to files:
configs/HGLRCF435_AIO/config.h
📚 Learning: 2025-07-23T13:43:50.456Z
Learnt from: ot0tot
PR: betaflight/config#0
File: :0-0
Timestamp: 2025-07-23T13:43:50.456Z
Learning: For Betaflight board configuration reviews, always verify that serial port defines use valid identifiers from the serialPortIdentifier_e enum in src/main/io/serial.h. Valid identifiers include: SERIAL_PORT_USB_VCP (20), SERIAL_PORT_SOFTSERIAL1 (30), SERIAL_PORT_SOFTSERIAL2 (31), SERIAL_PORT_LPUART1 (40), SERIAL_PORT_UART0 (50, if SERIAL_UART_FIRST_INDEX == 0), SERIAL_PORT_USART1 (51 or 50), SERIAL_PORT_USART2, SERIAL_PORT_USART3, SERIAL_PORT_UART4, SERIAL_PORT_UART5, SERIAL_PORT_USART6, SERIAL_PORT_USART7, SERIAL_PORT_USART8, SERIAL_PORT_UART9, SERIAL_PORT_USART10. While some aliases exist (like SERIAL_PORT_UART3 = SERIAL_PORT_USART3), prefer using the primary identifiers as referenced in the serialPortIdentifiers array to avoid build failures.
Applied to files:
configs/HGLRCF435_AIO/config.h
📚 Learning: 2025-07-03T15:17:30.040Z
Learnt from: haslinghuis
PR: betaflight/config#0
File: :0-0
Timestamp: 2025-07-03T15:17:30.040Z
Learning: In Betaflight configurations, when a target name suggests dual IMUs (like JHEF7DUAL) but specific hardware variants only have one gyro available, the preferred solution is to use DEFAULT_GYRO_TO_USE macro to specify which gyro to use by default rather than pruning gyro defines or creating redundant configurations. This approach maintains compatibility when the same target is used by multiple hardware variants from the same manufacturer.
Applied to files:
configs/HGLRCF435_AIO/config.h
🔇 Additional comments (9)
configs/HGLRCF435_AIO/config.h (9)
26-27: BOARD_NAME matches directory — good.BOARD_NAME equals the folder name (HGLRCF435_AIO). This avoids target discovery/selection issues in Betaflight builds.
29-38: Feature set looks consistent with the described hardware.ICM42688P over SPI, DPS310 over I2C, W25Q128 flash on SPI, and MAX7456 for analog OSD are coherent choices for an F435-based AIO.
43-47: Motor timer mapping aligns with PB6–PB9 = TIM4 CH1–CH4.The TIMER_PIN_MAPPING entries for motors 1–4 onto timer “4”, channels 1–4 match the standard TIM4 mapping for PB6–PB9 and are a solid default even with DSHOT bitbang enabled.
Also applies to: 106-111
62-71: SPI bus layout is conventional and non-overlapping.
- Gyro on SPI1 (PA5/6/7 + CS PA4),
- MAX7456 on SPI2 (PB13/14/15 + CS PB12),
- Flash on SPI3 (PB3/4/5 + CS PA15).
This separation typically plays well with DMA and ensures good throughput.
Also applies to: 78-83
99-101: Gyro and board alignment defaults look intentional.GYRO_1_ALIGN = CW180_DEG and board yaw = -45 are reasonable compile-time defaults if they match the silkscreen arrow. No action.
102-105: Serial RX on USART2 with an external inverter control (PC13) looks standard.Good pattern for SBUS/IBUS wiring when hardware includes an inverter. No changes needed.
59-61: Verify AT32F43x I2C2 PA0/PA1 AF mapping & board routingThe board config currently sets:
#define I2C2_SCL_PIN PA0 #define I2C2_SDA_PIN PA1but Betaflight’s AT32 support does not enforce or validate alternate-function (AF) mappings in code. You’ll need to manually confirm:
- PA0 supports I2C2_SCL and PA1 supports I2C2_SDA in the AT32F43x reference manual’s AF mapping table.
- The DPS310 barometer (and any optional magnetometer) are wired to PA0/PA1 on your PCB.
- No other board functions conflict with I2C2 on PA0/PA1.
Repeat the same checks for lines 84–86 of this file.
72-77: PB2 Timer AF for Gyro CLKIN on AT32F435 Needs Manual Confirmation
Our searches in the Betaflight codebase did not reveal anyDEF_TIMentries binding PB2 to TIM2_CH4 for AT32F43x targets, so we need to be sure that this pin-timer pairing is actually supported and yields a valid CLKIN frequency for the ICM42688P (352 kHz – 60 MHz).Key locations to review:
- configs/HGLRCF435_AIO/config.h:72–77 (
GYRO_CLKIN_PIN PB2)- configs/HGLRCF435_AIO/config.h:106–112 (duplicate/secondary CLKIN mapping)
Please manually confirm that PB2 can be configured as TIM2 channel 4 AF on the AT32F435. If it isn’t, choose a supported pin/timer pair or disable CLKIN.
87-91: ADC1_DMA_OPT (11) is valid for AT32F43x (DMA2 Channel 5, within 0–13 range)
- The AT32 target enables DMA MUX with MAX_PERIPHERAL_DMA_OPTIONS = 14, so valid DMA_OPT values are 0 through 13 (11 < 14)
- In src/platform/AT32/dma_reqmap_mcu.c, the peripheral DMA channels map as follows: entries 0–6 = DMA1 Channels 1–7; entries 7–13 = DMA2 Channels 1–7. Index 11 corresponds to DMA2 Channel 5
- All SPI1/SPI3 TX/RX DMA_OPT default to DMA_OPT_UNUSED (–1) in common_defaults_post.h, so there’s no conflict unless you explicitly enable SPI DMA later
- If you add SPI1/SPI3 or timer-update DMA in the future, choose distinct DMA_OPT values (< 14) to avoid DMAMUX channel collisions.
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